RTAX-DSP
Microchip Technology / Microsemi (Space)
The RTAX-DSP is a radiation-tolerant, space-flight FPGA with embedded multiply-accumulate blocks for efficient implementation of DSP algorithms in space applications. It offers high performance and reliability without sacrificing radiation tolerance.
Technical specifications
- Device
- RTAX2000D
- Device (2)
- RTAX4000D
- System gates
- 2,000,000
- System gates (2)
- 4,000,000
- ASIC gates
- 250,000
- ASIC gates (2)
- 500,000
- Register (R-cells)
- 9,856
- Register (R-cells) (2)
- 18,480
- Combinatorial (C-cells)
- 19,712
- Combinatorial (C-cells) (2)
- 36,960
- Core ram blocks
- 64
- Core ram blocks (2)
- 120
- Core ram kbits (1,024 bits)
- 288
- Core ram kbits (1,024 bits) (2)
- 540
- Dsp mathblocks
- 64
- Dsp mathblocks (2)
- 120
- Hardwired clocks
- 4
- Hardwired clocks (2)
- 4
- Routed clocks
- 4
- Routed clocks (2)
- 4
- I/o banks
- 8
- I/o banks (2)
- 8
- User i/os (maximum)
- 166
- User i/os (maximum) (2)
- 166
- I/o registers
- 2,052
- I/o registers (2)
- 2,520
- Speed grades
- STD , -1
- Speed grades (2)
- STD, -1
- Screening levels*
- E, B, V, PROTO
- Screening levels* (2)
- E, B, V, PROTO
- Package (CQFP)
- 352
- Package (CQFP) (2)
- 352
- Total dose (functional)
- 300 krad
- Total dose (parametric)
- 200 krad
- SEU
- less than 1E-10 errors per bit-day (worst-case GEO)
- SEL immune
- to LETTH in excess of 117 MeV-cm2/mg
- SEU immune
- to LETTH > 37 MeV-cm2/mg
About
The RTAX-DSP family of space-flight FPGAs integrates embedded radiation-tolerant multiply-accumulate blocks into the RTAX-S product family, enhancing efficiency for arithmetic functions common in DSP algorithms. This design allows for complex DSP functions to be implemented in a single device, eliminating the need for external components for code storage or multiple-chip solutions for radiation mitigation, which significantly reduces power consumption and heat dissipation compared to SRAM-based FPGAs. RTAX-DSP offers high performance with densities up to 4 million equivalent system gates and 840 user I/Os, specifically for space-based applications. Its embedded radiation-tolerant DSP mathblocks feature 18-bit x 18-bit multiply-accumulate capabilities, enabling efficient implementation of DSP building blocks such as FIR and IIR digital filters, FFT, IFT, DCT, and Reed Solomon encoding algorithms. The family includes up to 120 mathblocks, each capable of operating at 125 MHz over the full military temperature range (-55 °C to 125 °C), achieving a total throughput of 15 billion multiply/accumulates per second (15 GMACS). The RTAX-DSP architecture incorporates SEU-hardened flip-flops for protection against heavy ion radiation in space and is offered in a Ceramic Quad Flat Pack (CQFP) package. It utilizes highly reliable, nonvolatile anti-fuse technology and is manufactured using the same 0.15 µm CMOS process as the RTAX-S and RTAX-SL FPGAs, ensuring similar radiation and reliability characteristics as these space-flight proven devices. RTAX-DSP also includes enhanced single event transient mitigation for registers to reduce transient capture rates at high frequencies, and the DSP Mathblock includes mitigation for both single-event transients in combinatorial circuits and single-event upsets in sequential circuits. It uses the same radiation mitigation techniques as RTAX-S, with SEU-hardened registers and single-event mitigation in the clock and power-on reset circuits. The product is QML Class V Certified and available with screening options including E-Flow (Microsemi Extended Flow), B-Flow (Mil-STD-883B), and Class V Flow processing as per MIL-PRF-38535. Qualification, inspection, assembly, and testing are performed in accordance with MIL-STD-883 Class B for QML Class Q and MIL-PRF-38535 for QML Class V.
Documentation
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