SP0 Rad-Tolerant 3U CompactPCI SBC
Aitech Systems
The SP0 is a radiation-tolerant 3U CompactPCI Single Board Computer (SBC) designed for space applications, featuring a PowerQUICC-III MPC8548E processor and low power consumption.
Key figurescomparable across the catalogue
- Power
- 10 W
Normalised to common units so this product can be compared with others in its category. The supplier's own wording is below.
As published by the supplier
- Processor
- PowerQUICC-III MPC8548E @ 833 MHz, 1.0 or 1.2 GHz
- Core complex bus (ccb) speed
- 333 MHz
- Form factor
- Rugged 3U CompactPCI SBC
- Pmc site
- One Standard PMC Site
- Compliance
- PICMG 2.0, Rev. 3.0 Compliant
- Role
- System Controller or Peripheral
- Ddr1 sdram
- 512 MB at 333 MHz with ECC
- Eprom boot memory
- Redundant 512 KB
- User flash memory
- 1 GB (8 GB Optional)
- Ethernet ports
- Two 10/100/1000 Mbps
- Async serial ports
- Up to four RS-422
- Ttl i/o lines
- Five Single Ended
- Dma engines
- Four High Performance
- Timers
- Four (Internal to the CPU)
- Watchdog timers
- Three independent
- Timing synchronization
- 1 PPS port
- Temperature sensors
- Three On-board (not avail. on Series 500)
- Rtos support
- VxWorks 6.x
- Radiation tolerance
- 100 kRad (Si) with no latch up or performance degradation
- Power consumption
- 10 W
About
The SP0 is a supported phase product, intended for use in current programs. This 3U SBC offers exceptional on-board functionality with a low power consumption of only 10 W. It utilizes a MPC8548E PowerQUICC-III processor, providing a processing speed of 1.17 GHz, a 333.3 MHz core complex bus (CCB), and fast DDR1 memory speeds. The SBC has undergone full radiation testing, successfully meeting the target of 100 kRad (Si) without latch-up or performance degradation, making it suitable for use in low (LEO), medium (MEO), and geostationary orbits (GEO). Key features include a rugged 3U CompactPCI form factor, a PowerQUICC-III MPC8548E processor configurable at 833 MHz, 1.0 GHz, or 1.2 GHz with a 333 MHz CCB speed, and one standard PMC site. It is PICMG 2.0, Rev. 3.0 Compliant and can operate as a system controller or peripheral. Memory includes 512 MB of DDR1 SDRAM at 333 MHz with ECC, redundant 512 KB EPROM Boot Memory, and 1 GB User Flash Memory (with an optional 8 GB). Connectivity options include two 10/100/1000 Mbps Ethernet Ports and up to four Async serial RS-422 Ports. It also features five Single Ended TTL I/O lines, four High Performance DMA Engines, four Timers (internal to the CPU), and three independent Watchdog Timers. A 1 PPS port is included for timing synchronization, along with three on-board temperature sensors (not available on Series 500). Options for front panel connectors are available, and it supports VxWorks 6.x RTOS. Space-qualified, conduction-cooled versions are also available (see SP0 Series 100, 200, and 500). The TMSP0 Rear Transition Module provides direct connection to all SP0-I/O interfaces for use in commercial air-cooled chassis.
Documentation
No public datasheet yet — request the datasheet / ICD from the supplier.