ODALISS DIPP
Emxys
The ODALISS DIPP is a compact, high-performance Data-Intensive Payload Processor designed for satellite applications, featuring a dual-core ARM + FPGA architecture running Linux OS.
Typed specifications31 values
Discloses 7 of 13 fields engineers filter by in this category (category median 5).
- Processor
- dual-core ARM® A9 + FPGA 28k LGs Fabric datasheet p.2
- Mass
- 60 g product page
- Envelope (L×W×H)
- 87 mm x 87 mm x 10 mm. product page
- RAM
- 64 MB SDRAM, OBC · datasheet p.2
- Mass storage
- 256 GB max · datasheet p.2 256 GB max · flash storage
- Operating system
- Linux OS datasheet p.2
- Supply voltage
- 5 V regulated bus · datasheet p.2
- Power consumption
- 1 650 W product page
- Data interface
- Ethernet datasheet p.2 Ethernet 10/100 Ethernet, ODALISS logic interfaces | SPI ODALISS logic interfaces | SPI | I2C ODALISS logic interfaces +9
- Processor architecture
- ARM Cortex-A dual-core ARM A9 · datasheet p.2
- Flight software support
- Linux OS powered with high level programming framework (Python, Java, etc.) datasheet p.2
- Connector
- 80-pins high-speed interface backplane connector. product page 10-pin Pogo-style for program and debug without mechanical stress. | 10-pin Pogo-style for NAND flash data access.
- Satellite class
- CubeSat ODALISS platform in 3U and 6U CubeSat sizes · datasheet p.2
- Cores
- 2 ARM A9 · datasheet p.2
- FPGA
- FPGA 28k LGs Fabric datasheet p.2
Each value is typed with its unit and measurement condition and cites the datasheet page it was taken from. Nothing is guessed: a field that is absent here has not been published by the manufacturer. machine-extracted ✓ checked by NewSpace Market ✓ manufacturer confirmed by the manufacturer.
As published by the supplier23 lines, in the manufacturer's own wording
- Connectors
- 80-pins high-speed interface backplane connector.
- Connectors (2)
- 10-pin Pogo-style for program and debug without mechanical stress.
- Connectors (3)
- 10-pin Pogo-style for NAND flash data access.
- Memory
- eMMC NAND flash or microSD card configurable from 4 GB up to 256 GB.
- Memory (2)
- 1 GB or 512 GB DDR3L RAM.
- High-speed connectivity
- 10/100 Mbps capacitive-coupled Ethernet connection.
- High-speed connectivity (2)
- USB Port.
- Standard logic interfaces
- Three CMOS-level UARTS.
- Standard logic interfaces (2)
- RS-485.
- Standard logic interfaces (3)
- USB port.
- Processing capabilities
- Xilinx® Zynq®-7000 SoC. Dual 667 MHz 32-bit ARM® Cortex®-A9 and 28 nm Xilinx® programmable logic.
- Processing capabilities (2)
- Single processor, symmetric dual processor, and asymmetric dual processor modes.
- Processing capabilities (3)
- FPGA with logic cell size selectable between 28k to 85k logic elements with possibility to be reconfigured in Run-Time.
- Power-supply
- Redundant power-supply directly from 2S lithium-based battery.
- Power-supply (2)
- Overcurrent, overvoltage, undervoltage and reverse connection protections.
- Power-supply (3)
- Power-supply shut-down and fault signals.
- Payload control
- Six Open-drain GP logic inputs.
- Payload control (2)
- Six open-drain GP logic outputs.
- Integration operating temperature
- -45 ºC to +85 ºC.
- Integration size
- 87 mm x 87 mm x 10 mm.
- Integration weight
- 60 grams
- Integration power consumption
- 1,650 W.
- Integration rad tolerant
- TID of 20Krad.
About
The ODALISS DIPP is a compact embedded computer engineered to deliver high computational performance for demanding applications in space. It is based on a dual-core ARM® + FPGA fabric (Xilinx® Zynq®-7000 SoC), which significantly enhances the satellite’s computational capabilities. This architecture allows for easy integration of high-level software, such as Python scripts, running on a Linux OS, alongside low-level software like bare-metal drivers or RTOS. Key features include a versatile architecture supporting multiprocessing, an Ethernet connection for high data processing requirements of payloads like Earth observation cameras and Software-Defined Radios (SDR), and a reconfigurable FPGA fabric for increased digital processing capability. It also offers a rich set of communication peripherals including Ethernet, UARTs, RS-485, I2C, USB ports, and GPIOs. The system is designed with redundant power supply directly from 2S lithium-based batteries, incorporating protections against overcurrent, overvoltage, undervoltage, and reverse connection, as well as power-supply shut-down and fault signals. It includes payload control with six open-drain GP logic inputs and six open-drain GP logic outputs. The DIPP is rad tolerant with a TID of 20Krad and operates across a wide temperature range.
Documentation
Need the full ICD, test reports or a specific revision? Ask the supplier directly.