VLSI 16-bit ADC with a Sampling Frequency of 200 MHz
CMOS 90 nm 16-bit 200 MSps pipeline ADC (Н18.64-2В, 2.5 V, 26.6×26.6×2.9 mm, 3 g, 85 dB SFDR, 75 dB SNR, -60 to +85 °C, built-in calibration) for radar/comms.
Technical specifications
- Purpose
- Critical systems ADC for radar, communications, DSP, and measurement equipment
- Year of release
- 2018
- Guaranteed service life, years
- 3
- Estimated production/delivery time
- 12 months
- Technology
- CMOS 90 nm
- Package
- Н18.64-2В
- Dimensions, mm
- 26.6×26.6×2.9
- Mass, g
- 3
- Resolution, bits
- 16
- Sampling frequency, MHz
- 200
- Analog supply voltage, V
- 2.5±5%
- Digital supply voltage, V
- 1.2±5%
- Current consumption, A
- 0.545
- Operating temperature, °C
- -60 to +85
- Differential nonlinearity, LSB
- -0.9 to +1
- Integral nonlinearity, LSB
- ±10
- SFDR, dB
- 85
- SNR, dB
- 75
- Architecture
- Pipeline with built-in calibration
- TRL
- 8
About
The VLSI 16-bit ADC with a Sampling Frequency of 200 MHz is a pipeline-type analog-to-digital converter manufactured using CMOS 90 nm technology for critical application systems, digital signal processing, radar, communications, and measuring equipment. Resolution 16 bit, sampling frequency 200 MHz, differential nonlinearity -0.9 to +1 LSB, integral nonlinearity ±10 LSB, spurious-free dynamic range 85 dB, SNR 75 dB. Supply 2.5±5% V analog, 1.2±5% V digital. Package Н18.64-2В, dimensions 26.6×26.6×2.9 mm, mass 3 g. Operating temperature -60 to +85 °C. Features built-in transfer characteristic calibration algorithm. Released 2018, 3-year life, 12-month delivery. Not customizable.
Documentation
No public datasheet yet — request the datasheet / ICD from the supplier.
